187 lines
9.1 KiB
Markdown
187 lines
9.1 KiB
Markdown
# Findings log
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One entry per claim. Every claim carries evidence (kernel source reference or
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blob offset + observed bytes). Claims that cannot be evidenced are registered
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in the Unknowns section instead. Blobs referenced by filename are the
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linux-firmware copies listed in `manifest.json` (SHA-256 TBD in fixtures).
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Blobs observed: mt7981/mt7915/mt7916/mt7986 × {wm, wa, rom_patch}
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(linux-firmware snapshot 2026-04-20, Debian).
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## F1 — Connac2 RAM container layout
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`[region data, packed from offset 0 in table order][optional hidden trailer
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(see F2)][n_region × 40-byte region table][36-byte trailer at EOF]`
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Evidence: `mt76_connac_mcu.c` `mt76_connac2_load_ram()` +
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`mt76_connac2_send_ram()` (region data streamed sequentially from offset 0;
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table and trailer located from EOF); `mt76_connac_mcu.h`
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`struct mt76_connac2_fw_region` / `_fw_trailer`. Confirmed by exact layout
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match on 8 RAM blobs (sum(region.len) + table + trailer (+ hidden trailer) ==
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file size).
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Region fields: `decomp_crc/decomp_len/decomp_blk_sz` (MCU-side decompression,
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unused when decomp_len==0 — all observed blobs), `addr`, `len`,
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`feature_set`, `type`.
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## F2 — Hidden second trailer carries the full build string
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Between region data and the kernel-parsed table sits a trailer the upstream
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loader never reads. WM blobs: 100 bytes; WA blobs: 36 bytes (no string).
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Observed family-wide (all 4 chips).
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WM hidden trailer = 16×'#' + `40 00 00 00` + 1-byte string length + flags +
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full build string + '#'-padding. Recovered strings:
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- mt7981_wm: `t-neptune-main-mt7915-1953-MT7981_MP2111_IMP-20240823161204`
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- mt7916_wm: `t-neptune-main-mt7915-1953-MT7916_MP2111_IMP-20240823170147`
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- mt7986_wm: `t-neptune-main-mt7915-1953-MT7986_MP2111_IMP-20240823160608`
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- mt7915_wm: `t-neptune-mp-mt7915-2045-MT7915_MP_7_4_2045-20220929103802`
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Significance: the kernel-visible trailer's `fw_ver[10]` is stripped
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(`____000000` WM / `DEV_000000` WA); the hidden trailer restores branch
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("main"/"mp"), internal build number (1953/2045), MP tag, and build
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timestamp. This is the version metadata the changelog tooling keys on.
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Evidence: bytes at offset `sum(region.len)` in each blob (see
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`manifest.json` → `hidden_trailer.raw_head`).
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## F3 — region `type` is a content tag used by some loaders
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All parsed mt79-family blobs: `type == 0` (`FW_TYPE_DEFAULT`). It is not
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ignored upstream: mt7921's loader selects
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`feature_set & FW_FEATURE_NON_DL && type == FW_TYPE_CLC` regions as
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country/location-calibration data instead of downloading them to the MCU.
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Evidence: `mt7921/mcu.c` CLC handling; `FW_TYPE_CLC` definition in
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`mt76_connac_mcu.h`.
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## F4 — Patch container format
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92-byte big-endian header (16-byte build date, 4-byte platform tag —
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"ALPS" on all four — hw_sw_ver, patch_ver, checksum, descriptor), 64-byte BE
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section table, plaintext section data at explicit offsets. All observed
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patch sections: `enc_type == 0` (plaintext).
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Evidence: `mt76_connac2_load_patch()` + `struct mt76_connac2_patch_hdr/_sec`
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in `mt76_connac_mcu.h`; exact parse of 4 patch blobs.
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Section counts: mt7915 patch = 2 sections, all others = 1; section `type`
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constant `0x30002` on every observed section (loader downloads all sections
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regardless; field semantics otherwise unobserved).
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## F5 — mt7981_rom_patch internal structure (first disassembly, 2026-08-20)
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The 9.7KB patch section (downloaded to 0x00900000) is a boot-ROM function
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replacement table + code + strings, little-endian NDS32:
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| offset | content |
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|---|---|
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| 0x000 | `0x000003ff`, 0 |
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| 0x008 | 10 LE pointers into boot ROM (`0x00801xxx–0x0082bxxx`) |
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| 0x108 | 10 LE pointers into patch RAM (`0x009002xx–0x009012xx`) — replacements |
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| ~0x1e0 | NDS32 code (Ghidra: 49 functions + entry marker) |
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| 0x901000+ | string table |
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Decompilation is viable end-to-end (Ghidra 12 `NDS32:LE:32`, official
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module; our ELF imports directly — deferred acceptance check now PASSED).
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Evidence: `ghidra-proj/patch_decomp.txt` (unpublished, blob-derived).
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Verified observations:
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- Assert anchors: `patch/wf/wm/sys_patch_mcu.c` (lines 0x426, 0x5de...),
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`common/sys_patch_common_mcu.c` (0x20f, 0x248...) via ROM `func_0x008004b8`.
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- 20+ distinct direct calls into boot ROM (`func_0x0080xxxx`) + GP-relative
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indirect calls (`unaff_gp - 0x116xx`) — ROM provides the runtime library.
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- Named-entry strings: `MCU_Patch_init`, `ENTRY_wsysMboxSendMsg`,
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`ENTRY_wsysMboxRcvAllMsg` (mailbox IPC), `From_CCIF__host_cpu_sw_interrupt`
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(CCIF = host↔MCU channel), `WDT_to_Host` / `WDT_to_N9` (confirms the MCU
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core is called N9), `Patch_dic_handler_extend`, `WF_Lt_Sec_handler`.
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- Diagnostics suite strings: `AXI_Bus_monitor_detect`, `APB_AHB_bus_timeout`,
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`IDLM_monitor`, `CPU_UTLZ_CNT_*` (utilization counters),
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`cache_miss_ratio`, register-dump prints (`0x8800_0430` etc.).
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- `FUN_009002a6`: bus-register writer — LE dword writes to offsets
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0x110/0x114/0x118/0x11c on bus 5, RMW `| 0x400000c0`, busy-poll bit
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`0x40000000`. `FUN_0090044e`: bounded delay loop via ROM timer reads
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(`func_0x00801e20`/`func_0x00801e16`).
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Interpretation (labelled): the patch extends boot ROM with host-comm hooks
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(CCIF interrupt, mailboxes, watchdog-to-host) and bus diagnostics, plus
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download-plumbing register programming — the glue the ROM needs before
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WM/WA firmware arrives.
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## F6 — mt7981_wa survey (2026-08-20)
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Ghidra project `wa` imported + analyzed: 120 functions, 450 strings.
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Strings self-identify WA's role — host command handling and TX bookkeeping
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(`MCU_EXT_CMD` protocol), matching the driver's separate WA MCU queue:
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- `cmdEventParserCmd` with `ucCID` printing; `EXT_CMD_ID_STAREC_UPDATE`,
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`DevInfo Update Command`, `BssInfo Update Command` (own-MAC/BSS record
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management), `staRec with invalid wandidx` (station records)
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- Per-STA loss accounting: `PKTLOSS[%d]times/cnt[tot_tx,drop_tx,seq]`,
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`lost seq`, `dup seq`, `dlycnt/maxdly`, plus `[proto,port,src_ip,dest_ip]`
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flow dump formatting
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Next: match `MCU_EXT_CMD_*` enum ids (mt76 headers) to `cmdEventParserCmd`
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dispatch — the ABI anchor map (P1-C/D).
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## F7 — WA EXT_CMD dispatch table located (2026-08-20)
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Method: string xrefs fail on this code (GP-relative data addressing;
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decompiler shows `unaff_gp + imm`) — dispatch found structurally instead:
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`tools/scan_tables.py` scans for consecutive LE pointers into ILM
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(0x10200000–0x10233370).
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- **65-entry table @ ILM+0x1304 (vaddr 0x10201304)** = `MCU_EXT_CMD`
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dispatch, indexed by command id. Two default stubs: 0x10200278
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(unhandled) / 0x10200270 (reserved). Verified alignments with mt76 enum:
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[0x07] PM_STATE_CTRL→0x10201934, [0x08] CHANNEL_SWITCH→0x10201910,
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[0x11] SET_TX_POWER_CTRL→0x1020164c, [0x25] STA_REC_UPDATE→0x10201530,
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[0x26] BSS_INFO_UPDATE→0x1020155c, [0x2a] DEV_INFO_UPDATE→0x102015c4,
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[0x32] WTBL_UPDATE→0x10201688, [0x49] BCN_OFFLOAD→0x10201674.
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- ~30 non-default handlers → immediately nameable; ~15 non-default entries
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at ids beyond mt76's public enum (MTK-internal commands — discovery list).
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- Additional tables: 36-entry @ILM+0x330 (sparse; likely basic
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MCU_CMD/mailbox dispatch), 16-entry @ILM+0x8248.
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- Coverage prerequisite: forced linear disassembly (`ForceDisasmPost.py`)
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28,540 → 125,621 instructions — default analysis leaves most firmware
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code undisassembled (no entry graph reaches it).
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Next: same scan on WM; handler-by-handler decompile + naming pass.
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## F8 — mt7981_wm survey (2026-08-20)
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Ghidra project `wm`: forced disassembly to **555,385 instructions / 4,422
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functions** (import-time analysis alone: 226K/4,355).
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- Code model differs from patch/WA: only **27 GP-relative references** in
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the whole image → WM uses (near-)absolute global addressing, so GP-base
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inference is not the unlock it would otherwise be.
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- Structural dispatch scan (scan_tables.py) across every region pairing
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found **no absolute function-pointer table** (unlike WA's 65-entry
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table, F7). WM command dispatch must use another mechanism —
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FP/register-relative tables, switch jump tables, or runtime handler
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registration (unknown U4).
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- Regions: code 0xe003b000 (398KB) + 0xe009c400 (473KB mixed);
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data 0x0231dc00 (205KB), 0x0041xxxx pair; 0xf0xxxxxx block (feat 0x80)
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still uncharacterized (U1).
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## Unknowns registry
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- **U1 — `feature_set` bit 7 (0x80):** observed only on WM regions at
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`0xf0xxxxxx` addresses (mt7981 r7–r10, mt7986 equivalents). Upstream
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defines bits 0–6 only; vendor-SDK search found no definition (2026-08-20).
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Correlation with address family noted; semantics undetermined. May relate
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to a second download destination or content class.
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- **U2 — hidden-trailer non-string fields:** the `40 00 00 00` and flag
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bytes before/around the string (F2) are uninterpreted.
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- **U3 — WO container:** `mt7981_wo.bin` uses the mtk_wed loader
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(`mtk_wed_mcu.c`), a different format; not yet parsed.
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## Related verified facts
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- NDS32LE target: `GCC: (2018-10-23_nds32le-elf-mculib-v3) 4.9.4` string in
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mt7981_wa region data; FreeRTOS v10.0.0 + `portable/GCC/NDS32/port.c`
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strings in mt7981_wo.
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- No per-region encryption in any observed blob (`FW_FEATURE_SET_ENCRYPT`
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clear; patch `enc_type == 0`). Optional protocol support exists in the
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loader (key from EFUSE path) but is not exercised by shipped images.
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